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[VHDL-FPGA-Verilog] SPI_AT45DB041B

Description: 用verilog编写的SPI程序,SPI芯片是AT45DB041B.文件内包含程序仿真时的截图.包括read和wirte.-SPI prepared using Verilog procedures, SPI chip AT45DB041B. Document contains procedures for simulation screenshot. Including read and wirte.
Platform: | Size: 77824 | Author: 温海龙 | Hits:

[VHDL-FPGA-Verilog] SPI_to_I2C

Description: SPI和I2C转换的verilogHDL程序-SPI and I2C conversion procedures verilogHDL
Platform: | Size: 3072 | Author: 秦建 | Hits:

[VHDL-FPGA-Verilog] EP2C-SOURCE_CODE

Description: 有關於EP2C的一些程序(EX:I2C,FLASH,IRDA,MUSIC,LED,LIGHT,SRAM,UART,PS2,SPI )-EP2C on some of the procedures (EX: I2C, FLASH, IRDA, MUSIC, LED, LIGHT, SRAM, UART, PS2, SPI)
Platform: | Size: 2994176 | Author: 鄧志明 | Hits:

[source in ebook] xapp348

Description: spi源码，是verliog的，有需要的可依参考进行设计自己的工程，后续有需要还有一个使用说明附上-spi-source is the verliog, reference may need to design their own projects, there is a need to have a follow-up instructions attached
Platform: | Size: 852992 | Author: lee | Hits:

[Embeded-SCM Develop] spi_wishbone

Description: spi wishbone bus code
Platform: | Size: 49152 | Author: 磊 | Hits:

[VHDL-FPGA-Verilog] SPIsend

Description: Verilog HDL的程式，上網找到SPI程式， vspi.v這程式相當好用可用來接收與傳送SPI，並且寫了一個傳輸信號測試，spidatasent.v這程式就是傳送的資料，分別為00 66... 01 77...... 02 55這樣的資料，並透過MAX+PULS II軟體進行模擬，而最外層的程式是test_createspi.v！-Verilog HDL programs, Internet find SPI program, vspi.v this very useful program can be used to receive and send SPI, and wrote a transmission signal test, spidatasent.v this program is to send the information, namely, 00 66 ... 01 77 ...... 02 55 This information, and through the MAX+ PULS II software simulation, while the outermost layer of the program are test_createspi.v!
Platform: | Size: 145408 | Author: Rick | Hits:

[Embeded-SCM Develop] AIC

Description: 使用FPGA/CPLD设置语音AD、DA转换芯片AIC23，FPGA/CPLD系统时钟为24.576MHz 1、AIC系统时钟为12.288MHz，SPI时钟为6.144MHz 2、AIC处于主控模式 3、input bit length 16bit output bit length 16bit MSB first 4、帧同步在96KHz-The use of FPGA/CPLD set voice AD, DA conversion chip AIC23, FPGA/CPLD system clock for the 24.576MHz 1, AIC system clock is 12.288MHz, SPI clock is 6.144MHz 2, AIC is in master mode 3, input bit length 16bit output bit length 16bit MSB first 4, frame synchronization at 96KHz
Platform: | Size: 2048 | Author: 张键 | Hits:

[Embeded-SCM Develop] FREQSYN

Description: 使用Verilog语言编写的使用SPI总线设置频率LM2346,可通过设置其R寄存器对其输出频率进行设置（需相应的射频电路相配合）。-The use of Verilog language use SPI bus frequency settings LM2346, can be by setting up its R register set of its output frequency (to be matched by corresponding RF circuitry).
Platform: | Size: 1024 | Author: 张键 | Hits:

[JSP] spi3-aciklamali

Description: vhdl-spi module interface helpful source code
Platform: | Size: 6144 | Author: Onur | Hits:

[Embeded-SCM Develop] spicore

Description: 基于FPGA的SPI控制器.doc,包括FPGA实现地源代码和协议的基本介绍--FPGA-based SPI controller. Doc, including the FPGA to achieve an agreement to source code and a basic introduction
Platform: | Size: 7168 | Author: ss | Hits:

[Embeded Linux] neek_alternate_sd_card_controller

Description: This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).-This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).
Platform: | Size: 2167808 | Author: zhangdongqing | Hits:

[VHDL-FPGA-Verilog] hex2rom_0241_Win32

Description: This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).-This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).
Platform: | Size: 96256 | Author: zhangdongqing | Hits:

[SCM] ads7846

Description: 四线电阻式触摸屏，ads7846控制显示触摸坐标-Four-wire Resistive Touch Panel, ads7846 touch control display coordinates
Platform: | Size: 379904 | Author: 小神 | Hits:

[Embeded-SCM Develop] spi_op_core

Description: SPI协议的Verilog编程，包括时钟的产生模块，控制模块等-Verilog programming SPI protocol, including the selection of the clock module, control module, etc.
Platform: | Size: 82944 | Author: zhangyi | Hits:

[VHDL-FPGA-Verilog] MTDB_SYSTEM_CD_V1.0

Description: ALTERA Nios II Embedded Evaluation Kit开发板制造商(terasic)提供的多媒体显示板（Terasic Multimedia Touch Panel Daughter Board (MTDB)）扩展开发包。 里为有两个开源的例子 1.MTDB_SD_Card_Audio,从SD卡中读取WAV文件然后通过DA播放，这个对不SD Card的初学者非常的有用，可以知道使用FPGA SPI来读写SD CARD。 2.MTDB_Systhesizer,使用FPGA来做电子琴，要用FPGA来做合成器的看这个。 国内部分地区的网络对TERASIC封杀，原因不明，这个包是使用代理下载的，非常不容易。-ALTERA Nios II Embedded Evaluation Kit development board manufacturers (terasic) to provide multi-media display boards (Terasic Multimedia Touch Panel Daughter Board (MTDB)) the expansion of the development package. Where for example there are two open source 1.MTDB_SD_Card_Audio, from the SD card and then read the WAV file to play through the DA, the SD Card for the beginner is not very useful, we can see that the use of FPGA SPI read and write to SD CARD. 2.MTDB_Systhesizer, the use of FPGA as organ, synthesizer use FPGA to do the look at this. Internal parts of the network to block TERASIC for reasons unknown, the package is downloaded using a proxy, is not easy.
Platform: | Size: 27464704 | Author: myfingerhurt | Hits:

[VHDL-FPGA-Verilog] adc

Description: communication spi adc for spartan 3e
Platform: | Size: 4096 | Author: hung | Hits:

[VHDL-FPGA-Verilog] SPI_IIC_design_example

Description: ALTERA原厂提供的例程，网上很难找到的，在MAX2系列芯片上实现过，VHDL和VERILOG两种语言编写 IIC读写程序-ALTERA provided the original routine, it is difficult to find online and in the MAX2 series chip-off, VHDL and VERILOG two languages
Platform: | Size: 394240 | Author: 郑康山 | Hits:

[VHDL-FPGA-Verilog] sinc3filter

Description: 实现sinc3 FILTER的VHDL源码，还有实现SPI通讯的。-Sinc3 FILTER to achieve the VHDL source code, as well as the realization of SPI communication.
Platform: | Size: 5120 | Author: 李天鸿 | Hits:

[VHDL-FPGA-Verilog] spiflash_ctrl

Description: VHDL 语言实现的SPI FLASH的读写-VHDL language to read and write of the SPI FLASH
Platform: | Size: 6144 | Author: 李天鸿 | Hits:

[VHDL-FPGA-Verilog] spiflashcontroller_latest.tar

Description: This VHDL module implements a state controller for a serial (SPI) Flash ROM
Platform: | Size: 721920 | Author: mahmoud | Hits:
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